Content Comparison

Meeting Details

Topic: linaro-open-discussion meeting
Time: March 22 , 2021 10.00 AM London

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Excerpt

Confirmed topics

CXL on memory (Jonathan presented several new slides after the introduction in last call)
View file
name CXL Upstream Intro v2.pdf
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- Handling of memory on Type 2 devices (like GPU), two modes:
  - Host biased (coherency is managed as part of the host SoC)
  - Device biased (device issues coherence messages)
- Vikram's question: how should it be presented by Firmware?
  - Problem 1: normal memory at boot can't be offlined later
    - Likely to need element of BIOS control
  - Problem 2: pinned memory in region
    - Patch sets under review to migrate memory out of ZONE_MOVABLE on pin
- Generic Initiator Reminder
- GI as bridge for CXL etc.
  - https://lore.kernel.org/linux-acpi/C APcyv4gmd_cygXK0PpGkXmJLC3_ctEpRvpi5P-QcuXusFX5oNQ@mail.gmail.com/
Virtual CPU hotplug
View file
name Linaro Presentation-VCPUHP-QEMU-time-figures-Monday 22nd March 2021.pdf
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- Salil shared some figures about QEMU boot time impact by the number of CPU cores
  - Pre vCPU Init
  - Post vCPU Init (but pre-VGIC Init)
  - Post VGIC Init
  - Pre Linux Kernel Load
  - Post Kernel Load (But Pre SMBIOS setup)
- LP: we need to converge and do some wrap up for proposal
  - Salil to share some details about how to get the figures
Recording: link (password: *92a8xSE)