\uD83D\uDDD3 日期
\uD83D\uDC65 参与者
\uD83E\uDD45 目标
Two topics Huawei engineers wants to talk ：3 memory related topics and RAS
the batched TLB flush support on arm64 to optimize the performance of unmapping and page migration on arm64
https://lore.kernel.org/linux-mm/20230518065934.12877-1-yangyicong@huawei.com/
ARM64 RAS enhancement including below content. This is important for our product since we've met some real issues.
a) ARM64 support Machine Check safe memory copy(ARCH_HAS_COPY_MC)
https://lore.kernel.org/lkml/20221219120008.3818828-1-tongtiangen@huawei.com/
b) Handle synchronous exceptions with proper si_code
https://lore.kernel.org/lkml/20230408091359.31554-1-xueshuai@linux.alibaba.com/
https://lore.kernel.org/lkml/20221205160043.57465-1-xiexiuqi@huawei.com/We'd like to discuss the current status of these works, the solution and to see if there's any suggestions and worries.
For the RAS patch, wangkefeng.wang wants to discuss further：
He has communicated with the community and waiting for the feedback from the maintainersARM64 MC-Safe Copy,
Mark Rutland give some advises in v4 and all are adressed, Catain give us some comments in v8 and all are fixed too in v9. This feature is
pushed out one years ago( in 2022/4/16), so we want to make sure that
could it be picked up for v6.4?2)Handle synchronous exceptions with proper si_code
Both Huawei and Alibaba are trying to fix the commit
7f17b4a121d0 ("ACPI: APEI: Kick the memory_failure() queue for synchronous errors") which is from James Morse(glad to see James
is Cced), but for now no response from Ampere/arm.We want the two arm64 RAS enhancements to be accepted, any comments
and feedbacks from maintainer are appreciatedRecordings as below:
https://linaro-org.zoom.us/rec/share/1LJE1HXDt95vrmZYFwm_oj0kSN65XO1_2XTlJsP6ocT3Jv_U7EvzJMRofkDz_g8.gon6KIJ_LdIYZoEb
密码： 6Vq@cQC5
\uD83D\uDDE3 讨论主题
时间 | 条目 | 演讲者 | 说明 |
|---|---|---|---|
| Yicong | ||
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✅ 行动项
⤴ 决策
- Check with James’s time and re-arrange the meeting.