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Table of Contents

Meeting Date:  

Attendance

Steering Committee Members 

Name

Present 



Alternate 

Present 


Paul Isaac's, Linaro

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Graeme Gregory

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Grant Likely, ARM

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Member Guests

Name

Present 

Sean Varley, Ampere (tick)   (error)
Colin Alexander, ARM (tick)   (error)
Jack Liu, ARM (tick)   (error)
Kshitij Sudan, ARM (tick)   (error)
Duberly Mazuelos, ARM (tick)   (error)
Tina Tsou, ARM (tick)   (error)
Jie Zhao, Baidu

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David Berry, Broadcom

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Yuanliang Wang, ByteDance (tick)   (error)
Xian Liu, ByteDance (tick)   (error)
Loic Minier, Canonical

 (tick)   (error)

Junfen Li, China Mobile (tick)   (error)
Qihui Zhao, China Mobile (tick)   (error)
Xuan Jia, China Mobile (tick)   (error)
Yihui Wang, China Mobile (tick)   (error)
Yourong Ban, China Mobile (tick)   (error)
Sheng Wang, China Mobile (tick)   (error)
Jerome Tollet, Cisco (tick)   (error)
Maciek Konstantynowicz, Cisco (tick)   (error)
Tomas Fredberg, Ericsson (tick)
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Li Wan, Futurewei (tick)   (error)
Jonathan Cameron, Huawei (tick)
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Steve Poole, LANL (tick)   (error)
Prasun Kapoor, Marvell (tick)   (error)
Satananda Burla, Marvell (tick)   (error)
Sid Karkare, Marvell (tick)   (error)
Gil Bloch, Mellanox (tick)   (error)
Gil Shainer, Mellanox (tick)   (error)
Stephen Hemminger, Microsoft (tick)   (error)
Sowmini Varadhan, Microsoft (tick)   (error)
Yasuhiro Ohara, NTT (tick)   (error)
S. Ezaka, NTT (tick)   (error)
Jaswinder Singh, NXP (tick)   (error)
Sam Fuller, NXP (tick)   (error)
Al Stone, Red Hat (tick)   (error)
Rashid Khan, Red Hat (tick)   (error)
Andrew Younge, Sandia (tick)   (error)
Matthew Curry, Sandia (tick)   (error)
Whit Schonbein, Sandia (tick)   (error)
Greg-Scott Levy, Sandia (tick)   (error)
Ryan Grant, Sandia (tick)   (error)
Bill Mills, TI (tick)   (error)
Andrei Warkentin, VMWare (tick)   (error)
Donna Yasay, Xilinx (tick)   (error)
Steven Pope, Xilinx (tick)   (error)
Kartik Srinivasan, Xilinx (tick)   (error)
Jamon Bowen, Xilinx (tick)   (error)



Meeting Logistics

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Linaro

Name

Present 

Andrea Gallo(tick) (error)
Bill Fletcher

(tick) (error)

Jammy Zhou

(tick) (error)

Kevin Zhao(tick) (error)
Randy Linnell

(tick) (error)

Mark Orvek(tick) (error)
David Rusling(tick) (error)
Shashi Mallela(tick) (error)


Agenda

Minutes

    notes here
  • Review of how proposals are proceeding
  • Review of project structure
  • AOB
  • View file
    nameSmartNIC Meeting 2020-06-03.pdf
    height250

Minutes

  • Recap of target areas - non-exhaustive list options in slides
  • Tomas asked about ranking of list. Paul clarified, no particular order.
  • Tomas would like to see Enterprise and Telecoms have a wider scope.
  • Discussion: Hyperscalers able to utilise their own internal resources to build whatever they need. Hyperscalers might then push out to the market what they have developed to promote a 'defacto' option.
    • Telecoms (Ericsson and Huawei) would like to see commoditized SmartNIC options - features become standardised for ease of exchangeable hardware. 
  • Discussion: (Grant/Paul) What's the minimum CPU capability for SmartNICs - suggestion (Arm biased, to be open/fair) is a minimum of Cortex A72 and ideally Neoverse.
  • The CPU wouldn't be the only processing capability on the SmartNIC it can include accelerators/fpga/asic
  • Current proposals are available for review and editing
  • Proposal options have been widened to include 5G
  • Ensure that the proposals have manageable resource constraints
  • Standards proposal: The amount of work is considerable, aiming for Firmware, EDK2/UEFI, Redfish, how to talk from NIC to host. OVS is of great interest.
    • Discussion as to which standards to include - are they written to specific hardware, such as OCP (Facebook/Google participate) or to the Software-only emulation. Sam interested to see if we can leverage OCP.
    • Tomas highlighted the 'just a bunch of interface cards'
    • Sam would like to see what software models can be offloaded to the SmartNIC (not just dataplane traffic) - approach hyperscalers to see what offload interests they have.
    • OCP could be a target platform however the PCIe formfactor is preferred.
    • ODSA is about disaggregated compute structure
    • Hardware donations welcome
  • Software model proposal: based on SBSA QEMU 
    • Use of VirtIO to link multiple software-only SmartNICs
    • Looking at offload opportunities
  • Security proposal
    • Sam has been working on the proposal
  • Storage proposal
    • Futurewei has been trying to engage with Xilinx
    • Lookin to include Initiator and Target options
  • Dataplane / Network proposal
    • Request to see if interest in renaming Dataplane to Network
    • Grant raised that many are the proposal names are too generic and would prefer more specific naming
    • No objection to rename to Network
  • 5G proposal
    • New page for open proposals. So far no new entries.
  • Project Timeline/Structure
    • Andrea - Could a specific Use Case be developed which can converge the top down/bottom up approaches.
    • Membership structure - what is a strong must have , a nice to have, or a put on hold. This will help tune the proposals.
    • Grant - need to be informed as to what are the priorities for the members
    • Members being asked to say if there are real issues
    • Next couple of weeks to make the technical scope as much as possible

Action Items


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