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A type-1 hypervisor (like Xen) is separated from the “host” kernel (Dom0 in Xen terminology) which is now treated like any other guest on the system. It is the hypervisor itself that controls the physical address map through the stage 2 mappingshttps://developer.arm.com/documentation/102142/0100/Stage-2-translation that map the guest physical address (called IPA in Arm speak) to the final PA.
Host VRAM
The location of the VRAM will depend on the system architecture. Where the GPU is located on a PCIe bus there will be typically memory on the PCI card itself which can be presented to the host CPUs address space but is separate from system RAM. Systems with a unified memory structure are potentially easier to deal with as sharing the video memory to the guest is the same as any other host RAM.
Guest Device
Typically the guest will see the device as a PCIe device with multiple BARs. One will be the normal virtio-pci control space where queues and other such things can be controlled. The other will be the Host Visible Region which is where host allocated resource blobs will be visible to the guest.
Allocation Sequence
TBC